Voltage-variable resistor

Voltage-variable resistor

  
   The channel of a FET, whether JFET or MOST, is a region of semiconductor material whose depth, and hence resistance, can be controlled by the gate-source voltage. This is the essence of a voltage-variable resistor (VVR) or voltagecontrolled resistor (VCR) which, for example, can be placed in either the series or shunt arm (or both) of a potential divider to perform a voltage-controlled attenuator function. Alternatively, the VVR can be connected in the emitter circuit of a series feedback amplifier to control the a.c. voltage gain.


   FET channel conduction is bidirectional but not necessarily symmetrical about the origin of the output characteristic. In the ohmic region the output characteristic exhibits significant curvature and it is evident that, for approximately linear behaviour and low distortion, the signal voltage amplitude (VDS) across the channel must be restricted to several tens of millivolts.
   Equation 7.3 clearly illustrates the dependence of d.c. channel resistance (RDS) on both VGS and VDS but, if the control voltage can be modified to include an appropriate VDS-dependent term, RDS would then be linearized. Consider the circuit of Fig. 7.12 in which a resistor R1 is connected between the control voltage source (VC) and the FET gate; also R2 is connected between drain and gate providing some feedback of VDS to the gate. For this circuit

which is independent of VDS! The minimum drain-source resistance (RDSO) at VC=0, is given by Equation 7.6 as

Several constraints imposed by this circuit are recognized:
1. The control sensitivity has been halved due to the feedback.
2. To achieve maximum variation of resistance, R1 and R2 should be high in value since the total resistance across the source and drain terminals of the VVR is RDS in parallel with (R1+R2).
3. Also, the source terminal of the FET must be at a fixed potential (for example, earth potential) unless the control voltage source can float with the signal.

FET switches
   Due to the ease with which FETs can be turned OFF and ON they have wide application both as shunt and series switches. A typical example of the application of a discrete FET shunt switch is to discharge a capacitor; a multiplicity of such switches are used in digital-to-analogue and analogue-to-digital converters. A series switch normally is used as a transmission gate to conditionally connect a signal from one part of a circuit or system to another. In some devices an ON resistance as low as 1O can be achieved but, since such devices are physically large with a correspondingly high capacitance, their switching speed is rather limited. Smaller devices with ON resistances in the range 50 to 200 ohm can be switched much faster (tens of nanoseconds or less).

Shunt switch
   First, considering an n-channel depletion FET, the ON state (RDS=RDSO) is readily achieved by making VGS=0 V. To turn OFF the switch, VGS must be taken more negative than the most negative signal excursion of source or drain by at least the magnitude of the pinch-off voltage (Vp) or threshold voltage (VTH).
   Now, for an n-channel enhancement MOST the switch is OFF if VGS=0 V. To turn ON the switch, VGS must be driven positive by an amount (certainly exceeding VTH) limited by the gate breakdown voltage. For p-channel devices, the polarity of the gate voltage simply is reversed.

Series switch
   Controlling the ON and OFF states of an enhancement device used as a series switch is straightforward. Provided that the gate breakdown voltage is not exceeded in either direction, the ON state is achieved (for an n-channel MOST) by driving the gate to a high positive potential; for the OFF state, the gate is taken more negative than the most negative signal excursion.

   Controlling an n-channel depletion FET in a series switch configuration is rather more complex: the gate control voltage must float with the signal to achieve a constant ON resistance and, in the case of an n-channel JFET, the gate must not be forward biased. A simple circuit which automatically provides the correct turn-ON gate voltage is shown in Fig. 7.13.
   If the control voltage (VC) is driven above the input voltage (Vin), the diode is reverse biased and the resistor (R), connected between gate and source, establishes VGS=0 V— the ON state. If VC is taken negative (at least |Vp| below Vin), the diode conducts pulling the gate negative with respect to the source and turning OFF the switch.

   The value of R is not critical but, if too high, the turn-ON time of the switch is long and, if too low, a significant load may be placed on the input and control circuitry.
FET switches have the advantage over their BJT counterparts in that they have no equivalent of the offset voltage VCE(sat). The FET channel is resistive; as there are no junctions in the conducting path, the voltage developed across an ON FET switch is the product of RDSO and the current flowing.


Fuente: "Transistor Circuit Techeniques" J.G. Ritchie, Third Edition
Asignatura: EES
Nombre: María José Nieto Cárdenas

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